Another world’s first from Mixel’s customers employing Mixel’s MIPI technology
Mixel®, the leader in mobile mixed-signal intellectual property (IP), announced today that Enhanced Chip Technology (ECT), a leader in 3D chip technology, achieved first-time silicon success with Mixel MIPI® D-PHY Intellectual Property (IP) in record time. ECT integrated five different Mixel MIPI products into its ECT315H chip that are optimized for ECT’s world’s first full HD stereoscopic chip, capable of creating exceptionally comfortable and realistic 3D images, supporting auto-convergence, and employing MIPI interface technology. The five Mixel products are MXL-D-PHY-CSI-TX, MXL-D-PHY-CSI-RX, MXL-D-PHY-DSI-TX, MXL-D-PHY-DSI-RX, and MXL-PLL-MIPI.
“Mixel’s MIPI IP’s excellent metrics, outstanding support, and track record were critical factors that simplified our IP vendor selection process,” said Sung Moon Chun, ECT’s General Manager. “Mixel was able to support our pre-silicon proof-of-concept demo with their readily available MIPI platform. That was crucial in winning our end-customer’s business. First-time silicon success will enable us to go to production quickly and win a larger share of the emerging 3-D market. We are looking forward to expanding our collaboration with Mixel,” he added.
The Mixel MIPI D-PHY IP, incorporated into the ECT chip, supports all the D-PHY use-cases, namely CSI master, CSI slave, DSI master, and DSI slave, in addition to the MIPI PLL.
Mixel has so far proved its MIPI PHY in six different nodes and five different foundries. Mixel provides its customers with a complete solution, including D-PHY, controllers supporting all use cases, and MIPI platform that combines Mixel’s daughter card incorporating Mixel silicon-proven D-PHY with an off-the-shelf FPGA board that integrates both the D-PHY and controller RTL. The customer would then be able to add their own RTL to Mixel’s MIPI platform to rapidly bring up their MIPI based solution, thus saving many man-years of development and debugging time.
“This is the second world’s-first product we announce in the span of three months incorporating Mixel interface technology. Mixel continues to maintain its leadership in the MIPI IP market while living up to its ‘First time success is the rule, no exception’ track record,” said Ashraf Takla, Mixel President and CEO. “We are delighted that the mobile industry supply chain can now support 3D vision, employing MIPI interface technology from Mixel, using this pioneering ECT product.”
Mixel will be demonstrating the five MIPI IP, integrated into the final 3D product, at the MIPI Alliance face-to-face meeting in Seoul, Korea, March 13th, 2012. At the same event, Mixel will be demonstrating its D-PHY DSI, D-PHY CSI, and M-PHY products in multiple platforms, with a number of its Mixel’s MIPI Central partners, such as Agilent, Graphin, Northwest Logic, Tektronix, and VLSI+.
Memoir’s Algorithmic Memory® Awarded Top Prize in Semiconductor & IP Category
SANTA CLARA, Calif.--Memoir Systems Inc., the Semiconductor Intellectual Property (SIP) provider that delivers breakthrough memory performance today announced that it won the DesignCon 2012 DesignVision Award for the Semiconductor & IP Category with its Algorithmic Memory. The award was presented at DesignCon 2012 held in Santa Clara, California January 30 - February 2, 2012. The DesignCon technical committee was comprised of 130 engineers and industry editors who evaluated products from hundreds of nominees to choose the winners. Winners were selected based on three criteria: how well the product met the market’s vision and offered unique insight into customer needs; the originality of the solution and if it offered a new approach to meeting the market needs; and the quality of the implementation and how will it fits market requirements.
Adam Kablanian, CEO of Memoir Systems noted, “We are very pleased and excited to have our Algorithmic Memory honored by such a well known and esteemed group as DesignCon. We just formally introduced our technology in October of 2011 so it is especially gratifying to see how quickly we are gaining recognition in the marketplace. We believe that this award also validates the strength and quality of our technology, and how well it addresses the specific design needs of embedded memory developers and system architects.”
Kablanian added, “Memoir’s Algorithmic Memory technology is the result of the creative efforts of the entire team at Memoir Systems. However, it would not be possible without the vision, commitment, and tireless pursuit of excellence of the two co-founders of the company, Sundar Iyer, CTO and Da Chuang, COO.”
About Memoir Systems Algorithmic Technology
Memoir Systems’ Algorithmic Memory technology is implemented as standard RTL built around existing embedded memory macros. It presents multiple memory interfaces that can all be accessed simultaneously, giving up to 10X more Memory Operations Per Second (MOPS). Memory performance can now be viewed as a configurable entity so that memory performance characteristics, such as the number of read, write interfaces and any special requirements regarding area and power can be specified. In addition, Memoir’s synthesis platform can automatically select suitable memory macros from a memory IP library, and incorporate memory algorithms to synthesize a new memory that is custom-made for the targeted application.
ChipStart has published additional information on SSM (SoC System Manager) in the members area. To access this information login and click on the Members Area tab.
SSM is a hardware-software “subsystem” IP which decouples SoC system management functions, such as power, security, error recovery, and boot sequencing, from the specific design, and consolidates these tasks, promoting high reuse and faster hardware-software integration. Add SSM virtualization to you SoC architecture and save time and money.
The Founders of ChipStart, Howard Pakosh and Mark De Souza, were interviewed by Ikutaro Kojima (Senior Editor of Tech-ON) on their recent visit to Japan.
Kojuma-san investigates the new approach that ChipStart brings to the IP market in his article. Note that the article archive is only available to registered users, which is free and very straight forward.
GSA IP Licensing Best Practices Survey Global Semiconductor Alliance
It has been documented that the semiconductor IP (SIP) licensing period can take more than 22 weeks! GSA's IP Working Group is attempting to reduce the negotiation time and cost required to complete an average SIP licensing agreement by collecting information from IP suppliers and buyers. It is believed that if both sides of the negotiation table have a better understanding for what is reasonable and customary, then the negotiation process will be easier.
GSA is conducting a quarterly survey to gather data and publish results to aid in the semiconductor IP negotiation process between buyers and suppliers. The aggregated results will only be available to quarterly participants and all data will be kept confidential (i.e., participants will not be mentioned by name or company name).
The survey is currently open for all CYQ2 IP contract negotiations (April 1, 2011 - June 30, 2011).
DEADLINE: August 31, 2011 11:59PM CST
Survey