Low Power Embedded Memory SolutionsChipStart’s high performance single-port (1RW) synchronous high-density SRAM compiler targets low-voltage, low-power applications like wireless, handheld devices, where battery life is key to a products' market success.
This high-performance, low-power single-port synchronous RAM memory compiler is initially released on the TSMC 0.18um (CL018) process. The memory instances are optimized for two power supply voltages:
- 1.8V (+/-10%), this is the standard PVT condition with a WC/SS slow corner of 1.62V
- 1.0V (+/-10%), where Vdd can operate at a WC/SS slow corner of 0.9V
The memory will operate at voltages as low as 0.7V at reduced performance.
The user has flexibility in specifying the logical size of the RAM, including both word size and number of address locations, column MUX and output enable option. Generated memory have three aspect ratios for area optimization. Built in BIST interface allows for easy connection to third party BIST solutions.
Special Over-routing feature supported: Maximally 3-metal layers used; Lines from external circuitry can be routed over the SRAM in higher layers without interfering with the performance.