Introducing the Firefly Embedded DSP/CPU
ChipStart FireFly is a next-generation embedded DSP/CPU architecture. Just like its namesake, FireFly is small, energy efficient & well, brilliant! Architected with modern software in mind, FireFly not only accelerates application code development & performance, but also reduces memory requirements, core size and system power – by up to 50% over current architectures.
A next-generation CPU/DSP architecture designed for 21st century SOC applications. Over many years, processor designs have become disconnected from advances in embedded software development tools. FireFly brings them back together.
Architected from the ground-up, Firefly combines a modern architecture with industrial strength software tools for developing superior embedded devices.
Firefly Key Benefits
More features/mm. FireFly cores can be implemented as small as 20,000 gates while offering high clock speed;
Float without bloat: fast software floating point; optional hardware acceleration;
More performance/MHz: Over 3 Coremark/MHz, even for single-issue, single threaded implementations
Ideal for Low Cost Energy Sensitive Embedded Applications
The very short average instruction length allows FireFly to only access the instruction ROM or Instruction Cache every 5th clock in straight line code. Simplified SoC level control of power saving modes allow efficient sleep, halt, and power-down modes.
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